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| author |   Anshuman Khandual <anshuman.khandual@arm.com> | 2018-09-20 09:36:19 +0530 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2018-09-21 11:05:25 +0100 |
| commit | 1c8391412d7794e0b38393ed98fef9a974401f05 (patch) | |
| tree | 5849691864f75b3d0e62040f00ba0bc57beec68c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: cpu_errata: Remove ARM64_MISMATCHED_CACHE_LINE_SIZE (diff) | |
| download | linux-dev-1c8391412d7794e0b38393ed98fef9a974401f05.tar.xz linux-dev-1c8391412d7794e0b38393ed98fef9a974401f05.zip | |
arm64/cpufeatures: Introduce ESR_ELx_SYS64_ISS_RT()
Extracting target register from ESR.ISS encoding has already been required
at multiple instances. Just make it a macro definition and replace all the
existing use cases.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions