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| author |   Daniel Mack <zonque@gmail.com> | 2013-06-24 16:31:30 +0200 |
|---|---|---|
| committer |   Mark Brown <broonie@linaro.org> | 2013-06-25 10:32:08 +0100 |
| commit | 2352d4bf43b105ec2da5f43211db4a4c9bf34d4e (patch) | |
| tree | 71c6740303824f89611a11a918dd9ce16144213a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ASoC: adau1701: move firmware download to adau1701_reset() (diff) | |
| download | linux-dev-2352d4bf43b105ec2da5f43211db4a4c9bf34d4e.tar.xz linux-dev-2352d4bf43b105ec2da5f43211db4a4c9bf34d4e.zip | |
ASoC: adau1701: allow configuration of PLL mode pins
The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance
to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip
is released from reset, and a full reset cycle, including a new firmware
download is needed whenever they change.
This patch adds GPIO properties to the DT bindings of the Codec, and
implements makes the set_sysclk memorize the configured sysclk.
Because the run-time parameters are unknown at probe time, the first
firmware download is postponed to the first hw_params call, when the
driver can determine the mclk/lrclk divider. Subsequent downloads
are only issued when the divider configuration changes.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions