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| author |   Jon Hunter <jonathanh@nvidia.com> | 2016-10-22 20:23:53 +0100 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2016-11-15 15:51:53 +0100 |
| commit | 27b12b4e58525f7e8a612af5a3999126d0ea76fb (patch) | |
| tree | fc4c5d3d8bf59e81e6786829fd108ee2d1c304c3 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | soc/tegra: pmc: Guard against uninitialised PMC clock (diff) | |
| download | linux-dev-27b12b4e58525f7e8a612af5a3999126d0ea76fb.tar.xz linux-dev-27b12b4e58525f7e8a612af5a3999126d0ea76fb.zip | |
soc/tegra: pmc: Simplify IO rail bit handling
The function tegra_io_rail_prepare() converts the IO rail ID into a
bit position that is used to check the status and control the IO rail
in the PMC registers. However, rather than converting to a bit position
it is more useful to convert to a bit-mask because this is what is
actually used. By doing so the BIT() marco only needs to be used once
and we can use the IO_DPD_REQ_CODE_MASK when checking for erroneous rail
IDs.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: rebase and rename bit -> mask]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions