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| author |   Joseph Lo <josephl@nvidia.com> | 2013-07-03 17:50:39 +0800 |
|---|---|---|
| committer |   Stephen Warren <swarren@nvidia.com> | 2013-07-19 10:08:05 -0600 |
| commit | 2f5aaa3d2703256d37ae75818c495783d4ad0543 (patch) | |
| tree | 8a2a04aae10c5fc208e430e7fa4a457190fcfc03 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL (diff) | |
| download | linux-dev-2f5aaa3d2703256d37ae75818c495783d4ad0543.tar.xz linux-dev-2f5aaa3d2703256d37ae75818c495783d4ad0543.zip | |
ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15
When there is a cluster power down cycle in suspend, we need to set up
the correct L2 RAM data RAM latency to make L2 cache work correctly. This
is only needed for cluster 0 and needs to be done in tegra_resume before
the cache is enabled.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions