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author | 2018-07-26 16:15:44 +0300 | |
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committer | 2018-07-30 09:46:19 -0700 | |
commit | 386177da9e601ed176d54c04324d9ebf44c70620 (patch) | |
tree | c0cb9047afe65e8c1b4fc5156eec188927eaff79 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARC: dma [non-IOC] setup SMP_CACHE_BYTES and cache_line_size (diff) | |
download | linux-dev-386177da9e601ed176d54c04324d9ebf44c70620.tar.xz linux-dev-386177da9e601ed176d54c04324d9ebf44c70620.zip |
ARC: add SMP_CACHE_BYTES value validate
Check that SMP_CACHE_BYTES (and hence ARCH_DMA_MINALIGN) is larger
or equal to any cache line length by comparing it with values
previously read from ARC cache BCR registers.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions