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| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-05-19 15:50:43 +0300 |
|---|---|---|
| committer |   Wolfram Sang <wsa@kernel.org> | 2020-05-22 16:50:43 +0200 |
| commit | 3f35064a7cfef4ed8d25cdb16da0abfbbd525f63 (patch) | |
| tree | ef36a39ee37d87086f701b0564d7da20916f05ac /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | i2c: designware: Read counters from ACPI for PCI driver (diff) | |
| download | linux-dev-3f35064a7cfef4ed8d25cdb16da0abfbbd525f63.tar.xz linux-dev-3f35064a7cfef4ed8d25cdb16da0abfbbd525f63.zip | |
i2c: designware: Drop hard coded FIFO depth assignment
It's not clear why the commit fe20ff5c7e9c
("i2c-designware: Add support for Designware core behind PCI devices.")
followed by commit b61b14154b19
("i2c-designware: add support for Intel Lynxpoint")
chose to hard code FIFO depth size. The FIFO depth on all hardware,
I have tested on, can be nicely detected automatically.
Thus, we may safely drop hard coded FIFO sizes from the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions