diff options
| author |   Michael Chan <michael.chan@broadcom.com> | 2018-10-14 07:02:48 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-10-15 22:44:32 -0700 |
| commit | 41e8d7983752f2a0ada01fac11cbac7413e7beec (patch) | |
| tree | 362045f4fd72230d080e1e31d9d72b70c4f019b6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | bnxt_en: Adjust MSIX and ring groups for 57500 series chips. (diff) | |
| download | linux-dev-41e8d7983752f2a0ada01fac11cbac7413e7beec.tar.xz linux-dev-41e8d7983752f2a0ada01fac11cbac7413e7beec.zip | |
bnxt_en: Modify the ring reservation functions for 57500 series chips.
The ring reservation functions have to be modified for P5 chips in the
following ways:
- bnxt_cp_ring_info structs map to internal NQs as well as CP rings.
- Ring groups are not used.
- 1 CP ring must be available for each RX or TX ring.
- number of RSS contexts to reserve is multiples of 64 RX rings.
- RFS currently not supported.
Also, RX AGG rings are only used for jumbo frames, so we need to
unconditionally call bnxt_reserve_rings() in __bnxt_open_nic()
to see if we need to reserve AGG rings in case MTU has changed.
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions