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| author |   Damien Lespiau <damien.lespiau@intel.com> | 2015-01-20 12:51:44 +0000 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-01-27 09:51:00 +0100 |
| commit | 49af449b457b721ac5c18f537cf7484903f212f8 (patch) | |
| tree | f5625a5ee2290d06a617e15b8e9cdc465dc522b1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/skl: Gen9 coarse power gating (diff) | |
| download | linux-dev-49af449b457b721ac5c18f537cf7484903f212f8.tar.xz linux-dev-49af449b457b721ac5c18f537cf7484903f212f8.zip | |
drm/i915: Change plane_config to store a tiling_mode
Rather than having "tiled" meaning "is it X-tiled?" convert the field to
explicitely store the tiling mode. The code doesn't have to change much
as 1 is conveniently I915_TILING_X.
This is to accommodate future changes around tiling modes and scannout
buffers.
v2: Rebase on top of Ander's "Make intel_crtc->config a pointer"
Reviewed-By: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions