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authorLaxman Dewangan <ldewangan@nvidia.com>2013-02-12 20:47:59 +0530
committerStephen Warren <swarren@nvidia.com>2013-02-13 11:17:03 -0700
commit527fad1bc519df8eedd397482febb51526e5d987 (patch)
tree003feaff3289f9d27292d2332710e951f142ea25 /tools/perf/scripts/python/export-to-postgresql.py
parentARM: tegra: remove clock-frequency properties from serial nodes (diff)
downloadlinux-dev-527fad1bc519df8eedd397482febb51526e5d987.tar.xz
linux-dev-527fad1bc519df8eedd397482febb51526e5d987.zip
clk: tegra: initialise parent of uart clocks
Initialise the parent of UARTs to PLLP and disabling clock by default. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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