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author | 2020-09-06 21:29:23 +0200 | |
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committer | 2020-09-18 16:27:00 +0200 | |
commit | 5ef415107dfd42a334d62a9b7be9754817df92ed (patch) | |
tree | 8721bedce8f68009a6e1d4449c869b3804ee47f8 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA (diff) | |
download | linux-dev-5ef415107dfd42a334d62a9b7be9754817df92ed.tar.xz linux-dev-5ef415107dfd42a334d62a9b7be9754817df92ed.zip |
MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the <cpu-features-override.h> header.
Add that information to cpu_probe_ingenic().
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions