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| author |   Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2021-05-08 09:09:27 +0200 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2021-05-14 16:16:28 +0530 |
| commit | 60ece833ccd00c4fc9b10bbce2fa6291f61c6230 (patch) | |
| tree | fd0eb39e609f73f26323e07f5d0dac563132f9e0 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: phy: mediatek,mt7621-pci-phy: add clock entries (diff) | |
| download | linux-dev-60ece833ccd00c4fc9b10bbce2fa6291f61c6230.tar.xz linux-dev-60ece833ccd00c4fc9b10bbce2fa6291f61c6230.zip | |
phy: ralink: phy-mt7621-pci: use kernel clock APIS
MT7621 SoC clock driver has already mainlined in
'commit 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC")'
This allow us to properly use kernel clock apis to get
the clock frequency needed for the phy configuration
instead of use custom architecture code to do the same.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210508070930.5290-4-sergio.paracuellos@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions