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authorMark Bloch <mbloch@nvidia.com>2021-08-03 16:19:48 -0700
committerSaeed Mahameed <saeedm@nvidia.com>2021-08-05 13:49:24 -0700
commit6aeb16a1345e480bd395b9168570e93c902a05f3 (patch)
tree9b9bdb9d96552e3e30506750ebbe58ca1699ec3b /tools/perf/scripts/python/export-to-postgresql.py
parentnet/mlx5: Lag, add initial logic for shared FDB (diff)
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RDMA/mlx5: Fill port info based on the relevant eswitch
In shared FDB a single RDMA device can have representors that are connected to two different eswitches. Use the right eswitch when preparing the response to userspace. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Mark Zhang <markzhang@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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