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| author |   Manasi Navare <manasi.d.navare@intel.com> | 2017-06-26 12:21:44 -0700 |
|---|---|---|
| committer |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-06-27 12:55:15 +0300 |
| commit | 770a17a5713af26d1490d4f669194ed959b88241 (patch) | |
| tree | 79e64fdb81190fa996ec46d08feb236eb5a8925c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Break modeset deadlocks on reset (diff) | |
| download | linux-dev-770a17a5713af26d1490d4f669194ed959b88241.tar.xz linux-dev-770a17a5713af26d1490d4f669194ed959b88241.zip | |
drm/i915/dp: Fix the t11_t12 panel power cycle delay from VBT read
When we read the VBT t11_t12 value for panel power cycle delay,
it is a zero based value so we need to 100ms to that. And then it
needs to be multiplied by 10 to store it in 100usecs unit same as
SW VBT.
v3:
* Add it as part of series
v2:
* Change the VBT value instead of HW readout and pp div (Ville Syrjala)
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498504905-21067-1-git-send-email-manasi.d.navare@intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions