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author | 2017-12-08 16:35:10 +0800 | |
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committer | 2017-12-08 10:08:07 +0100 | |
commit | 7d333ef1cc1b8c8951f3a2c41f6406e2295d8be9 (patch) | |
tree | fe53d1a1e2a6ba5b08691018ee13b293825350a6 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks (diff) | |
download | linux-dev-7d333ef1cc1b8c8951f3a2c41f6406e2295d8be9.tar.xz linux-dev-7d333ef1cc1b8c8951f3a2c41f6406e2295d8be9.zip |
clk: sunxi-ng: Support fixed post-dividers on NM style clocks
On the A83T, the audio PLL should have its div1 set to 0, or /1, and
div2 set to 1, or /2. This setting is the default, and is required
to match the sigma-delta modulation parameters from the BSP kernel.
To do this, we first add fixed post-divider to the NM style clocks,
which is the type of clock the audio PLL clock is modeled into.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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