diff options
| author |   Paul Walmsley <paul@pwsan.com> | 2012-12-28 02:10:44 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2013-01-02 12:07:16 -0700 |
| commit | 7e7fff8254e318cede06a1a8c55b0d86dd4d8c5b (patch) | |
| tree | 38ad0446026932ed55ae1af167dae17c0a417f3a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: OMAP3: clock data: Add missing enable/disable for EMU clock (diff) | |
| download | linux-dev-7e7fff8254e318cede06a1a8c55b0d86dd4d8c5b.tar.xz linux-dev-7e7fff8254e318cede06a1a8c55b0d86dd4d8c5b.zip | |
ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
On OMAP2xxx chips, the register bitfields for the
PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are
different than those used on OMAP3/4. The order is reversed. So, for
example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0
indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on
OMAP3/4, 0x3 indicates 'ON'.
To fix this, we treat the OMAP3/4 values as the powerdomain API
values, and create new low-level powerdomain functions for the
OMAP2xxx chips which translate between the OMAP2xxx values and the
OMAP3/4 values.
Without this patch, the conversion of the OMAP2xxx PM code to the
functional powerstate code results in a non-booting kernel.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions