diff options
| author |   Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-05-05 19:52:17 +0800 |
|---|---|---|
| committer |   Viresh Kumar <viresh.kumar@linaro.org> | 2022-05-12 10:38:14 +0530 |
| commit | 818c8321d8def50971188b8b33ef2a43ca1e2511 (patch) | |
| tree | f62b742d38873ba2c4bc85db33e347afbe13c738 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | cpufreq: mediatek: Fix potential deadlock problem in mtk_cpufreq_set_target (diff) | |
| download | linux-dev-818c8321d8def50971188b8b33ef2a43ca1e2511.tar.xz linux-dev-818c8321d8def50971188b8b33ef2a43ca1e2511.zip | |
dt-bindings: cpufreq: mediatek: Add MediaTek CCI property
MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module
for scaling clock frequency and adjust voltage.
The phandle could be linked between CPU and MediaTek CCI for some
MediaTek SoCs, like MT8183 and MT8186.
The reason we need the link status between cpufreq and MediaTek cci is
cpufreq and mediatek cci could share the same regulator in some MediaTek
SoCs. Therefore, to prevent the issue of high frequency and low voltage,
we need to use this to make sure mediatek cci is ready.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions