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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 12:28:47 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 12:28:47 +0200 |
| commit | 948f592433f87f8b9c38d43995478eb4561b8629 (patch) | |
| tree | feca9a36db480d1b81ace912625e67accba3df9a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: Move RPC core clocks (diff) | |
| parent | dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions (diff) | |
| download | linux-dev-948f592433f87f8b9c38d43995478eb4561b8629.tar.xz linux-dev-948f592433f87f8b9c38d43995478eb4561b8629.zip | |
Merge tag 'renesas-r9a07g043-dt-binding-defs-tag' into renesas-clk-for-v5.19
Renesas RZ/G2UL DT Binding Definitions
Clock and reset definitions for the Renesas RZ/G2UL (R9A07G043) SoC,
shared by driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions