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author | 2013-02-11 12:25:06 +0100 | |
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committer | 2013-02-16 17:54:26 +0000 | |
commit | 9520a5bece13b7382f4b0059180f61530c423c81 (patch) | |
tree | b1ea5eae98171dd61a35964160407abf9c0f18d0 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARM: 7648/1: pci: Allow passing per-controller private data (diff) | |
download | linux-dev-9520a5bece13b7382f4b0059180f61530c423c81.tar.xz linux-dev-9520a5bece13b7382f4b0059180f61530c423c81.zip |
ARM: 7649/1: mm: mm->context.id fix for big-endian
Since the new ASID code in b5466f8728527a05a493cc4abe9e6f034a1bbaab
("ARM: mm: remove IPI broadcasting on ASID rollover") was changed to
use 64bit operations it has broken the BE operation due to an issue
with the MM code accessing sub-fields of mm->context.id.
When running in BE mode we see the values in mm->context.id are stored
with the highest value first, so the LDR in the arch/arm/mm/proc-macros.S
reads the wrong part of this field. To resolve this, change the LDR in
the mmid macro to load from +4.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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