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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-11-23 21:04:59 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-01-23 17:58:56 +0200 |
| commit | a7d08ff19c14a717fe82769eaa3083aac5cf9db4 (patch) | |
| tree | f6ad4083e924ebb7e916a2d8c8f706092621d739 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/rockchip: Use drm_mode_get_hv_timing() to populate plane clip rectangle (diff) | |
| download | linux-dev-a7d08ff19c14a717fe82769eaa3083aac5cf9db4.tar.xz linux-dev-a7d08ff19c14a717fe82769eaa3083aac5cf9db4.zip | |
drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip rectangle
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle.
No functional changes as the code already uses crtc_state->mode
to populate the clip, which is also what drm_mode_get_hv_timing()
uses.
Once everyone agrees on this we can move the clip handling into
drm_atomic_helper_check_plane_state().
v2: Rebase due to tegra_plane_state_add() relocating to plane.c
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171123190502.28449-13-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions