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author | 2012-11-05 16:45:49 -0500 | |
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committer | 2012-11-07 13:48:43 +0100 | |
commit | aaf5e0be79e37d5a8509f09852788fa6a82522b2 (patch) | |
tree | 0a836f40209121408cf83e74d629239c20ac16ca /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARM: zynq: dts: add description of the second uart (diff) | |
download | linux-dev-aaf5e0be79e37d5a8509f09852788fa6a82522b2.tar.xz linux-dev-aaf5e0be79e37d5a8509f09852788fa6a82522b2.zip |
ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
The main UART on the Xilinx ZC702 board is UART1, located at address
e0001000. Add a Kconfig option to select this device as the low-level
debugging port. This allows the really early boot printouts to reach
the USB serial adaptor on this board.
For consistency's sake, add a choice entry for UART0 even though it is
the the default if UART1 is not selected.
Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions