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author | 2019-07-12 18:09:21 -0700 | |
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committer | 2019-07-26 15:02:17 -0700 | |
commit | aaf70b90a4f196b1abd67f97dace64a60308234e (patch) | |
tree | e6dbf6eec4c3173d3024ddc5b893e0a6ea6961d2 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/tgl: select correct bit for port select (diff) | |
download | linux-dev-aaf70b90a4f196b1abd67f97dace64a60308234e.tar.xz linux-dev-aaf70b90a4f196b1abd67f97dace64a60308234e.zip |
drm/i915/tgl: update ddi/tc clock_off bits
In GEN 12 PORT_C DDI clk_off bit is not equally distanced to A/B,
it's at offset 24. Similarly TC port (5/6) clk off bits are at
offset 22/23. Extend the macros to cover the additional ports.
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-4-lucas.demarchi@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions