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| author |   Joseph Lo <josephl@nvidia.com> | 2013-02-19 18:16:13 +0800 |
|---|---|---|
| committer |   Stephen Warren <swarren@nvidia.com> | 2013-03-11 14:29:22 -0600 |
| commit | b095ae2b9f35c838257786de27e550d62bd7c763 (patch) | |
| tree | 52c81ea41fce50f8db6c7732a3d4743182fab57e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: tegra: No 7.1 super clk dividers on Tegra20 (diff) | |
| download | linux-dev-b095ae2b9f35c838257786de27e550d62bd7c763.tar.xz linux-dev-b095ae2b9f35c838257786de27e550d62bd7c763.zip | |
ARM: tegra: don't unlock MMIO access to DBGLAR
There is no need to unlock MMIO access to the DBGLAR all the time. Doing
so may even cause problems if a SW bug causes writes to that MMIO region.
Cortex-A15 processors do not support the CP14 register write the code
currently uses to unlock the DBGLAR; the instruction throws an undefined
instruction exceptions. This prevents tegra_secondary_startup() from
executing on Tegra114, and hence prevents SMP.
Remove the code that unlocks this access.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions