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author | 2021-03-06 20:17:24 -0800 | |
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committer | 2021-03-12 10:13:55 +0100 | |
commit | c15b99ae2ba9ea30da3c7cd4765b8a4707e530a6 (patch) | |
tree | 4cee9045cad9ecef0098319366a23c3cc9e10036 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | mips: bmips: bcm63268: include dt-bindings (diff) | |
download | linux-dev-c15b99ae2ba9ea30da3c7cd4765b8a4707e530a6.tar.xz linux-dev-c15b99ae2ba9ea30da3c7cd4765b8a4707e530a6.zip |
MIPS: pci-mt7620: fix PLL lock check
Upstream a long-standing OpenWrt patch [0] that fixes MT7620 PCIe PLL
lock check. The existing code checks the wrong register bit: PPLL_SW_SET
is not defined in PPLL_CFG1 and bit 31 of PPLL_CFG1 is marked as reserved
in the MT7620 Programming Guide. The correct bit to check for PLL lock
is PPLL_LD (bit 23).
Also reword the error message for clarity.
Without this change it is unlikely that this driver ever worked with
mainline kernel.
[0]: https://lists.infradead.org/pipermail/lede-commits/2017-July/004441.html
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions