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| author |   Chanwoo Choi <cw00.choi@samsung.com> | 2015-02-02 23:23:58 +0900 |
|---|---|---|
| committer |   Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-04 18:58:09 +0100 |
| commit | d0f5de6677de4405c9acdb88db7c7cf7b9cc954e (patch) | |
| tree | e5aca1e3b38270b58b8c753492b0daad58c1e16d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain (diff) | |
| download | linux-dev-d0f5de6677de4405c9acdb88db7c7cf7b9cc954e.tar.xz linux-dev-d0f5de6677de4405c9acdb88db7c7cf7b9cc954e.zip | |
clk: samsung: exynos5433: Add clocks for CMU_PERIC domain
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has 'ioclk_*' prefix.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[ideal.song: Change clk flags of to pclk_gpio_* clk, pclk_gpio_* should be always on]
Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions