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authorHuacai Chen <chenhuacai@loongson.cn>2022-10-12 16:36:14 +0800
committerHuacai Chen <chenhuacai@loongson.cn>2022-10-12 16:36:14 +0800
commitd279134168c78ac2caa1f7cd2a846579da1c93ac (patch)
treed77ab5ef3f2ac782823aea728906a7942af1c35a /tools/perf/scripts/python/export-to-postgresql.py
parentLoongArch: Support access filter to /dev/mem interface (diff)
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LoongArch: Use TLB for ioremap()
We can support more cache attributes (e.g., CC, SUC and WUC) and page protection when we use TLB for ioremap(). The implementation is based on GENERIC_IOREMAP. The existing simple ioremap() implementation has better performance so we keep it and introduce ARCH_IOREMAP to control the selection. We move pagetable_init() earlier to make early ioremap() works, and we modify the PCI ecam mapping because the TLB-based version of ioremap() will actually take the size into account. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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