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| author |   Paul Burton <paul.burton@imgtec.com> | 2013-11-19 17:30:36 +0000 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 18:17:12 +0200 |
| commit | dab75dd956522ce19403c108f659ea9b339f2559 (patch) | |
| tree | 698c8bf58371ff0928397702efc068bfb848c645 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | MIPS: Simplify PTRACE_PEEKUSR for FPC_EIR (diff) | |
| download | linux-dev-dab75dd956522ce19403c108f659ea9b339f2559.tar.xz linux-dev-dab75dd956522ce19403c108f659ea9b339f2559.zip | |
MIPS: Simplify ptrace_getfpregs FPU IR retrieval
All architecturally defined bits in the FPU implementation register
are read only & unchanging. It contains some implementation-defined
bits but the architecture manual states "This bits are explicitly not
intended to be used for mode control functions" which seems to provide
justification for viewing the register as a whole as unchanging. This
being the case we can simply re-use the value we read at boot rather
than having to re-read it later, and avoid the complexity which that
read entails.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6147/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions