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author | 2012-11-13 10:33:40 +0530 | |
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committer | 2012-11-13 11:42:39 -0700 | |
commit | e245f54a06f6aeb025b50eb02c2969fb4e254b46 (patch) | |
tree | 80d0b328e16f137ab0ea3cc86d736efe335441ed /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ARM: tegra: enable data prefetch on L2 (diff) | |
download | linux-dev-e245f54a06f6aeb025b50eb02c2969fb4e254b46.tar.xz linux-dev-e245f54a06f6aeb025b50eb02c2969fb4e254b46.zip |
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions