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author | 2018-10-10 13:46:19 +0200 | |
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committer | 2018-10-10 13:47:06 +0200 | |
commit | e4c080a10a23577303c0ef05c37c18661f758f34 (patch) | |
tree | 546133150e70de482d394bda623ba2ae75a48a55 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | Merge tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux into next/drivers (diff) | |
parent | drivers: clk: Add ZynqMP clock driver (diff) | |
download | linux-dev-e4c080a10a23577303c0ef05c37c18661f758f34.tar.xz linux-dev-e4c080a10a23577303c0ef05c37c18661f758f34.zip |
Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx into next/drivers
arm64: zynqmp: SoC CLK changes for v4.20
This patchset adds CCF compliant clock driver for ZynqMP.
Clock driver queries supported clock information from firmware
and regiters pll and output clocks with CCF.
* tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
drivers: clk: Add ZynqMP clock driver
dt-bindings: clock: Add bindings for ZynqMP clock driver
firmware: xilinx: Add zynqmp IOCTL API for device control
Documentation: xilinx: Add documentation for eemi APIs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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