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authorOlof Johansson <olof@lixom.net>2013-06-07 17:01:42 -0700
committerOlof Johansson <olof@lixom.net>2013-06-07 18:21:51 -0700
commite56c60c374bbcd343ed286c713116056bf3d6d36 (patch)
tree287370ef948fbd7b9dc45c54e7ed7d384258dd26 /tools/perf/scripts/python/export-to-postgresql.py
parentdrivers/bus: arm-cci: fix combined ARMv6+v7 build (diff)
parentclk: zynq: Remove deprecated clock code (diff)
downloadlinux-dev-e56c60c374bbcd343ed286c713116056bf3d6d36.tar.xz
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Merge tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx into next/soc
From Michal Simek: arm: Xilinx Zynq clock changes for v3.11 Change Xilinx Zynq DT clock description which reflects logical abstraction of Zynq's clock tree. - Refactor PLL driver - Use new clock controller driver - Change timer and uart drivers * tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx: clk: zynq: Remove deprecated clock code arm: zynq: Migrate platform to clock controller clk: zynq: Add clock controller driver clk: zynq: Factor out PLL driver Signed-off-by: Olof Johansson <olof@lixom.net>
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