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author | 2016-04-21 12:25:38 +0100 | |
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committer | 2016-05-13 15:30:25 +0200 | |
commit | e70ac023f9515c70cf2b291a294f0f250df29847 (patch) | |
tree | 9548c871ba43f1022cfc06216f1d9b5609f85905 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | MIPS: ptrace: Prevent writes to read-only FCSR bits (diff) | |
download | linux-dev-e70ac023f9515c70cf2b291a294f0f250df29847.tar.xz linux-dev-e70ac023f9515c70cf2b291a294f0f250df29847.zip |
MIPS: Allow emulation for unaligned [LS]DXC1 instructions
If an address error exception occurs for a LDXC1 or SDXC1 instruction,
within the cop1x opcode space, allow it to be passed through to the FPU
emulator rather than resulting in a SIGILL. This causes LDXC1 & SDXC1 to
be handled in a manner consistent with the more common LDC1 & SDC1
instructions.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13143/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions