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| author |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-02-14 19:46:07 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-02-20 00:21:47 +0100 |
| commit | eb32e4584d8e9d6cbec20550d4f91396de2cdb55 (patch) | |
| tree | 00aa2e120f0a86df9b7071836f5d8a829ac3af8d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+ (diff) | |
| download | linux-dev-eb32e4584d8e9d6cbec20550d4f91396de2cdb55.tar.xz linux-dev-eb32e4584d8e9d6cbec20550d4f91396de2cdb55.zip | |
drm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remap
Yet another remnant ... this might explain why l3 remapping didn't
really work on HSW.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441
Spotted-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions