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| author |   Imre Deak <imre.deak@intel.com> | 2017-06-29 18:36:59 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-07-06 16:29:13 +0300 |
| commit | edfda8e37ae9ec530434c3a014c8f0155a72acbd (patch) | |
| tree | d334a9ef0c24bd6bc5534492256e04af8028261f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling (diff) | |
| download | linux-dev-edfda8e37ae9ec530434c3a014c8f0155a72acbd.tar.xz linux-dev-edfda8e37ae9ec530434c3a014c8f0155a72acbd.zip | |
drm/i915/skl: Don't disable misc IO power well during display uninit
Bspec requires leaving the misc IO power well enabled during display
uninit, so align the code accordingly.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-3-git-send-email-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions