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| author |   Rob Herring <robh@kernel.org> | 2019-10-28 11:32:45 -0500 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-10-29 10:51:34 +0000 |
| commit | ee352c272e41c67aac887cbfd8c6aa71e5721997 (patch) | |
| tree | bc922dce03924dff869b0b493515ebcbc0eb9e59 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | PCI: xgene: Use pci_parse_request_of_pci_ranges() (diff) | |
| download | linux-dev-ee352c272e41c67aac887cbfd8c6aa71e5721997.tar.xz linux-dev-ee352c272e41c67aac887cbfd8c6aa71e5721997.zip | |
PCI: xilinx: Use pci_parse_request_of_pci_ranges()
Convert the Xilinx host bridge to use the common
pci_parse_request_of_pci_ranges().
There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions