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author | 2016-10-27 14:37:41 +0800 | |
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committer | 2016-11-07 14:16:59 +0800 | |
commit | f24940e00062f47f1e45fb20c405c2ed6bc006a3 (patch) | |
tree | 870c8e20770d28ce62ebd3e7225be77fb53ee873 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/gvt: add write vreg in MMIO DMA_CTRL handler (diff) | |
download | linux-dev-f24940e00062f47f1e45fb20c405c2ed6bc006a3.tar.xz linux-dev-f24940e00062f47f1e45fb20c405c2ed6bc006a3.zip |
drm/i915/gvt: correct the emulation in TLB control handler
Need a explicit write_vreg in TLB MMIO write handler, beside that
TLB vreg should update correspondingly following HW status to do
correct emulation.
Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions