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| author |   Brett Creeley <brett.creeley@intel.com> | 2020-07-29 17:19:16 -0700 |
|---|---|---|
| committer |   Tony Nguyen <anthony.l.nguyen@intel.com> | 2020-08-01 08:44:04 -0700 |
| commit | f34f55557ac9a4dfbfbf36c70585d1648ab5cd90 (patch) | |
| tree | d72a787c489998b0184487d798889e321664f852 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ice: Clear and free XLT entries on reset (diff) | |
| download | linux-dev-f34f55557ac9a4dfbfbf36c70585d1648ab5cd90.tar.xz linux-dev-f34f55557ac9a4dfbfbf36c70585d1648ab5cd90.zip | |
ice: Allow 2 queue pairs per VF on SR-IOV initialization
Currently VFs are only allowed to get 16, 4, and 1 queue pair by
default, which require 17, 5, and 2 MSI-X vectors respectively. This
is because each VF needs a MSI-X per data queue and a MSI-X for its
other interrupt. The calculation is based on the number of VFs created,
MSI-X available, and queue pairs available at the time of VF creation.
Unfortunately the values above exclude 2 queue pairs when only 3 MSI-X
are available to each VF based on resource constraints. The current
calculation would default to 2 MSI-X and 1 queue pair. This is a waste
of resources, so fix this by allowing 2 queue pairs per VF when there
are between 2 and 5 MSI-X available per VF.
Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions