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| author |   Jonathan Austin <jonathan.austin@arm.com> | 2016-08-30 17:27:19 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@armlinux.org.uk> | 2016-09-06 15:51:07 +0100 |
| commit | f5a5c89e36d0897b65e4e6bc2f646f75f8074263 (patch) | |
| tree | beaaf4b52d04056a54fea8fc7d9706f2d01f481b /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: 8603/1: V7M: Add addresses for mem-mapped V7M cache operations (diff) | |
| download | linux-dev-f5a5c89e36d0897b65e4e6bc2f646f75f8074263.tar.xz linux-dev-f5a5c89e36d0897b65e4e6bc2f646f75f8074263.zip | |
ARM: 8604/1: V7M: Add support for reading the CTR with read_cpuid_cachetype()
With the addition of caches to the V7M Architecture a new Cache Type
Register (CTR) is defined at 0xE000ED7C. This register serves the same
purpose as the V7A/R version and accessed via the read_cpuid_cachetype.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Tested-by: Andras Szemzo <sza@esh.hu>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions