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| author |   Chris Brandt <chris.brandt@renesas.com> | 2018-09-24 11:49:35 -0500 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2018-09-26 14:22:00 +0200 |
| commit | 1f7db7bbf031828178216527523b29cb6001f86f (patch) | |
| tree | 21aa9aadf2714b3bb13f14d5d019fd5f14db0fee /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | clk: renesas: r8a77970: Add TPU clock (diff) | |
| download | linux-dev-1f7db7bbf031828178216527523b29cb6001f86f.tar.xz linux-dev-1f7db7bbf031828178216527523b29cb6001f86f.zip | |
clk: renesas: cpg-mssr: Add early clock support
Add support for SoCs that need to register core and module clocks early in
order to use OF drivers that exclusively use macros such as
TIMER_OF_DECLARE.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions