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| author |   Conor Dooley <conor.dooley@microchip.com> | 2022-10-10 23:17:04 +0100 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-11 12:39:05 -0700 |
| commit | 71c8517e004b950a148581ea2d2abe10aa46e02d (patch) | |
| tree | 5c44b8e57d72809052407c426ff4dde1f39248fa /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | Merge tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (diff) | |
| download | linux-dev-71c8517e004b950a148581ea2d2abe10aa46e02d.tar.xz linux-dev-71c8517e004b950a148581ea2d2abe10aa46e02d.zip | |
MAINTAINERS: update polarfire soc clock binding
The clock binding has been renamed and a new binding added for the
clock controllers in the FPGA fabric. Generalise the pattern to
cover both.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221010221704.2161221-2-conor@kernel.org/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions