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| author |   Phil Edworthy <phil.edworthy@renesas.com> | 2022-05-12 12:47:21 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2022-05-16 10:14:27 +0100 |
| commit | 72069a7b2821443f57e5734f91e19936c48e4809 (patch) | |
| tree | 7f5a87b2c4943ef3d44ad5509e1b071e613686f8 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs (diff) | |
| download | linux-dev-72069a7b2821443f57e5734f91e19936c48e4809.tar.xz linux-dev-72069a7b2821443f57e5734f91e19936c48e4809.zip | |
ravb: Use separate clock for gPTP
RZ/V2M has a separate gPTP reference clock that is used when the
AVB-DMAC Mode Register (CCC) gPTP Clock Select (CSEL) bits are
set to "01: High-speed peripheral bus clock".
Therefore, add a feature that allows this clock to be used for
gPTP.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions