diff options
author | 2022-04-13 08:58:33 +0100 | |
---|---|---|
committer | 2022-04-22 18:40:19 -0700 | |
commit | 8e8fbab4f1e659f9955bc946a2fc71b8c3ba17e0 (patch) | |
tree | 04cd5061778bfc8c6e4b2d118bc1dc727adf01f4 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | dt-bindings: clk: mpfs: add defines for two new clocks (diff) | |
download | linux-dev-8e8fbab4f1e659f9955bc946a2fc71b8c3ba17e0.tar.xz linux-dev-8e8fbab4f1e659f9955bc946a2fc71b8c3ba17e0.zip |
dt-bindings: rtc: add refclk to mpfs-rtc
The rtc on PolarFire SoC does not use the AHB clock as its reference
frequency, but rather a 1 MHz refclk that it shares with MTIMER. Add
this second clock to the binding as a required property.
Fixes: 4cbcc0d7b397 ("dt-bindings: rtc: add bindings for microchip mpfs rtc")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220413075835.3354193-7-conor.dooley@microchip.com
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions