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author | 2017-06-26 22:07:50 -0700 | |
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committer | 2018-08-13 09:36:02 -0700 | |
commit | b67bc7cb408816b94224a74dff9868d2a38bf30c (patch) | |
tree | b34c3971cbc2e70e716a6cbbea905da4142d8001 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | RISC-V: Fix !CONFIG_SMP compilation error (diff) | |
download | linux-dev-b67bc7cb408816b94224a74dff9868d2a38bf30c.tar.xz linux-dev-b67bc7cb408816b94224a74dff9868d2a38bf30c.zip |
dt-bindings: interrupt-controller: RISC-V local interrupt controller
Add documentation on the RISC-V local interrupt controller, which is a
per-hart interrupt controller that manages all interrupts entering a
RISC-V hart. This interrupt controller is present on all RISC-V systems.
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
[hch: minor cleanups]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions