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author | 2021-11-18 22:35:39 -0600 | |
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committer | 2021-11-23 10:29:05 +0100 | |
commit | c962f10f3931e8409f67dc52725df13e23c67d2d (patch) | |
tree | c9ff3595d6979a0c91be392283e09dfdae431f01 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | clk: sunxi-ng: Allow the CCU core to be built as a module (diff) | |
download | linux-dev-c962f10f3931e8409f67dc52725df13e23c67d2d.tar.xz linux-dev-c962f10f3931e8409f67dc52725df13e23c67d2d.zip |
dt-bindings: clk: Add compatibles for D1 CCUs
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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