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| author |   Le Ma <le.ma@amd.com> | 2020-09-05 23:15:48 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-03-10 00:01:47 -0500 |
| commit | f37945d50ff5194449ae1a8f53e862c2bcf43464 (patch) | |
| tree | 3fb1c78d1e1b63e83b767ee7e9e8a19e1eaefa02 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | drm/amdgpu: add soc15 common ip block support for aldebaran (diff) | |
drm/amdgpu: add mmhub support for aldebaran (v3)
v1: dupilcate mmhub_v1_7.c from mmhub_v1_0.c because
mmhub register address for aldebaran is different
from existing asics (Le)
v2: switch to latest mmhub_v9_4_2 register headers (Hawking)
v3: squash in init VM_L2_CNTL3 default value for mmhub v1_7
Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions