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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-04-13 13:56:04 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-04-13 13:56:04 +0200
commit0faf567d6df616f2f2434ad71250fefe5529d7a0 (patch)
treec75137422f36b0aa0d7ee4ae1bba2d732f24a3d6 /tools/perf/scripts/python/exported-sql-viewer.py
parentarm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi (diff)
parentdt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions (diff)
downloadlinux-dev-0faf567d6df616f2f2434ad71250fefe5529d7a0.tar.xz
linux-dev-0faf567d6df616f2f2434ad71250fefe5529d7a0.zip
Merge tag 'renesas-r9a07g043-dt-binding-defs-tag' into HEAD
Renesas RZ/G2UL DT Binding Definitions Clock and reset definitions for the Renesas RZ/G2UL (R9A07G043) SoC, shared by driver and DT source files.
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