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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-07-17 10:57:49 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-07-17 10:57:49 +0200 |
| commit | 810cc7ffb5d847f3b36f38cd8663026a4d92aa99 (patch) | |
| tree | 489d9f947dd8625e38e66584702baa1fa6a3e7d8 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | arm64: dts: renesas: Restructure Makefile (diff) | |
| parent | clk: renesas: Add r8a774e1 CPG Core Clock Definitions (diff) | |
| download | linux-dev-810cc7ffb5d847f3b36f38cd8663026a4d92aa99.tar.xz linux-dev-810cc7ffb5d847f3b36f38cd8663026a4d92aa99.zip | |
Merge tag 'renesas-r8a774e1-dt-binding-defs-tag' into renesas-arm-dt-for-v5.9
Renesas RZ/G2H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G2H (R8A774E1)
SoC, shared by driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions