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| author |   Phil Edworthy <phil.edworthy@renesas.com> | 2018-09-10 17:02:54 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2018-09-14 15:34:50 +0200 |
| commit | 9aa2126f16daeb8cd3027a70a2629130b0e618d9 (patch) | |
| tree | 0698d1e83dd6d5f418d971b0259c532db1c2262d /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: dts: r9a06g032: Use r9a06g032-sysctrl binding definitions (diff) | |
| download | linux-dev-9aa2126f16daeb8cd3027a70a2629130b0e618d9.tar.xz linux-dev-9aa2126f16daeb8cd3027a70a2629130b0e618d9.zip | |
ARM: dts: r9a06g032: Correct UART and add all other UARTs
- UART0 was missing the bus clock ("apb_pclk").
- Use recently accepted r9a06g032 and rzn1 compat strings.
- Add all the other UARTs.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
[simon: updated changelog]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions