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| author |   Athira Rajeev <atrajeev@linux.vnet.ibm.com> | 2022-06-10 19:11:01 +0530 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2022-06-29 08:57:44 +1000 |
| commit | 5196a27978dcc74251eab14cffa8fa96813e0365 (patch) | |
| tree | 56efbdfe4abf3a021b99f4918c6eb33abce49202 /tools/perf/scripts/python/flamegraph.py | |
| parent | selftests/powerpc/pmu: Add selftest for group constraint check MMCRA sample bits (diff) | |
selftests/powerpc/pmu: Add selftest for checking invalid bits in event code
Some of the bits in the event code is reserved for specific platforms.
Event code bits 52-59 are reserved in power9, whereas in power10, these
are used for programming Monitor Mode Control Register 3 (MMCR3). Bit 9
in event code is reserved in power9, whereas it is used for programming
"radix_scope_qual" bit 18 in Monitor Mode Control Register 1 (MMCR1).
Testcase to ensure that using reserved bits in event code should cause
event_open to fail.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-24-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions