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| author |   Mauro Rossi <issor.oruam@gmail.com> | 2020-07-10 20:15:01 +0200 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-07-27 16:46:20 -0400 |
| commit | 89571d7c31011abd5673ef22f0da72ecaef7b7a5 (patch) | |
| tree | 9dd2666a39625131a2e847462e54b8269743f5d8 /tools/perf/scripts/python/flamegraph.py | |
| parent | drm/amd/display: dce_hwseq: add DCE6 specific macros,functions (diff) | |
drm/amd/display: dce_ipp: add DCE6 specific macros,functions
[Why]
DCE6 does not have CURSOR2_DEGAMMA_MODE bit in DEGAMMA_CONTROL register
[How]
Add DCE6 specific macros definitions for IPP masks
DCE6 IPP macros will avoid buiding errors when using DCE6 headers
Add dce60_ipp_set_degamma() function w/o Cursor2 Degamma programming
Use dce60_ipp_set_degamma() in ipp_funcs dce60_ipp_funcs
Add DCE6 specific dce60_ipp_construct
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions