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| author |   David Galiffi <David.Galiffi@amd.com> | 2019-10-01 18:29:56 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-11-13 15:29:43 -0500 |
| commit | 5622b2d68d0a6e2fd960f2129704dc3c561608b2 (patch) | |
| tree | 25f234e9cc08335b678a241cfe7c1d746cb78635 /tools/perf/scripts/python/netdev-times.py | |
| parent | drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP (diff) | |
drm/amd/display: Create debug option to disable v.active clock change policy.
[WHY]
It has been a useful option in debugging GFXOFF and P.State Change issues.
May be required as for platform specific workaround.
[HOW]
Create option in enum dc_debug_options, "disable_vactive_clock_change".
When it is set, dm_dram_clock_change_vactive, will translate into
p_state_change_support: false.
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions