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| author |   Jack Xiao <Jack.Xiao@amd.com> | 2019-07-15 05:12:21 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-08-02 10:30:41 -0500 |
| commit | 02938eed74a3d75c743c3b8a80c80ba130dd6674 (patch) | |
| tree | e8fa440b4f37a67c0d196c36e40e344cf6e59879 /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header (diff) | |
| download | linux-dev-02938eed74a3d75c743c3b8a80c80ba130dd6674.tar.xz linux-dev-02938eed74a3d75c743c3b8a80c80ba130dd6674.zip | |
drm/amdgpu: correct smu rlc handshake enablement bit
Correct the enablement bit of SMU RLC handshake.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions